Amorphous soft magnetic shielding and keeper for MRAM devices

ABSTRACT

An amorphous soft magnetic thin film material for forming shielding and keeper applications in MRAM devices. The amorphous soft magnetic material may be deposited using Physical Vapor Deposition (PVD) in the presence of a magnetic field, in order to form shielding layers and keepers in a multi-layer metallization process. The soft magnetic material may be an amorphous metallic alloy, such as CoZrX, where X may be Ta, Nb, Pd and/or Rh.

FIELD OF THE INVENTION

[0001] The present invention generally relates to magnetic random accessmemory (MRAM) devices and more particularly, to an amorphous softmagnetic layer for application as a shield and keeper in MRAM devices.

BACKGROUND OF THE INVENTION

[0002] Magnetic Random Access Memory (MRAM) devices based onspin-dependent tunnel junctions are being explored as non-volatile solidstate memory devices for embedded and stand alone applications. MRAMdevices utilize magnetic material within memory cells to store databits. The data bits are read by magnetoresistive sensing. MRAM memorycells can be programmed by magnetizing the magnetic material within thecells. The magnetic field required to switch the state of a cell (e.g.,from “0” to “1”) is typically quite low, e.g., in the range of 10-25Oersteds (Oe).

[0003] In its basic concept, an MRAM memory cell typically consists of apatterned magnetic multi-layer bit region, and two conductive lines(e.g., the word and bit lines) that are used to read and write themagnetic state of the multi-layer bit region. In further refinements,additional magnetic layers have been included within MRAM memory cellsin order to (1) provide magnetic shielding and (2) improve writeefficiency.

1. Magnetic Shielding

[0004] In order to successfully incorporate MRAM into portableelectronic devices such as portable phones, personal digital assistants(PDA's), pagers, and the like, it is necessary to shield the MRAMdevices from stray magnetic fields that may present within and aroundsuch devices. Examples of such disturbances include the magnetic fieldgenerated by a loudspeaker in a telephone, which may be as large asapproximately 800 Oe, and the current in the overhead lines of a train,which may produce magnetic fields as large as approximately 50 Oe.

[0005] Efforts have been made to shield MRAM devices from these types ofstray magnetic fields. For example, U.S. Pat. No. 5,902,690 of Tracy etal. (“Tracy et al.”) describes the introduction of a passivation layerencapsulating the chip. Tracy et al. describes two embodiments of apassivation layer. The first embodiment uses a ceramic material thatincludes ferrite particles to encapsulate the MRAM cell. The secondembodiment uses a ferrite film, which is deposited on top of the MRAMdevice. U.S. Pat. No. 6,211,090 of Durlam et al. (“Durlam et al.”)describes another method of shielding an MRAM device, namely by forminga metallic, high permeability shielding layer, such as NiFe, on top ofthe completed device.

2) Improving Write Efficiency by use of a Magnetic Keeper

[0006] Inserting a soft magnetic keeper around the write conductors ofan MRAM device has been found to provide a desirable modification orconcentration of the flux path resulting in an increase of the writeefficiency, which could result in a decreased power consumption of thedevice. U.S. Pat. No. 5,956,267 of Hurst et al. discloses such anarrangement.

[0007] An important aspect of magnetic shielding and keeper layers istheir compatibility with standard integrated circuit (IC) metallizationprocessing. A state of the art metallization scheme typicallyencompasses the use of multilevel copper metallization layers, separatedby dielectric layers such as Plasma Enhanced Chemical Vapor Deposited(PECVD) SiO₂ or other low k materials (e.g., in a dual damascenemetallization scheme). For a magnetic layer to be integrated in such aprocess flow, the following criteria are desirable:

[0008] 1. The permeability μ of the magnetic film should be sufficientlyhigh (e.g., >100). The efficiency of shielding is proportional to thefilm thickness “t” multiplied by μ. Having an insufficient value of μresults in an unpractical requirement on the thickness of the magneticshielding layer.

[0009] 2. The thermal stability of the magnetic material must be suchthat the permeability is not reduced significantly by the thermal budgetassociated with the process.

[0010] The thermal budget of a damascene process is typically governedby the dielectric deposition. One example of a typical temperature forsuch a process may be 450° C.

[0011] 3. The preparation method of the magnetic film should preferablyemploy standard semiconductor deposition methods such as Physical VaporDeposition (PVD) or Chemical Vapor Deposition (CVD).

[0012] 4. The magnetic material should preferably not contain metalswhich, when diffusing in the silicon, would degrade transistorperformance. If such materials are used, the use of a diffusion barrieris required.

[0013] 5. In the case of the keeper layer, the permeability has to havea high value at frequencies close to and slightly above the writefrequency of the memory (e.g., several hundreds of MHz to low GHz).

[0014] While above-referenced prior art teachings provide shielding andkeepers for use with MRAM devices, they suffer from some drawbacksresulting from the materials that are used, which make them difficult toincorporate into a multi-layer IC metallization process.

[0015] For example, while the inventions of Tracy et al. and Durlam etal. are effective to shield MRAM devices from stray magnetic fields,they suffer from some drawbacks resulting from the types of materialsused for the shielding and passivation layers. For example, theforegoing references propose using either oxidic magnetic films (e.g.,Mn-Zn-Ferrite or Ni-Zn-Ferrite) or crystalline metallic films (e.g.,NiFe alloys) for shielding. Crystalline materials (e.g., Ni₈₀Fe₂₀,Ni₄₅Fe₅₅, FeTaN) generally display some degree of recrystallizationduring high temperature processes which leads to a degradation ofmagnetic properties. Therefore, these materials may be unsuited formulti-layer IC fabrications in which a device undergoes one or more hightemperature processes after the deposition of a shielding or passivationlayer.

[0016] In Hurst et al., NiFe, CoNiFe and CoFe are suggested as materialsfor keeper fabrication. One drawback associated with the materials usedfor the keeper of Hurst et al. is that they require the use of adiffusion barrier such as TiW, TaN, or the like. The inclusion of thisadditional diffusion layer undesirably complicates and increases thecost of the fabrication process. Furthermore, it has been found that thepermeability of such materials drops typically in the frequency range oftens to hundreds of MHz, due to eddy current losses and ferromagneticresonance. This adversely affects the operation and effectiveness of thekeeper layers at frequencies relatively close to the write frequency oftypical MRAM devices (e.g., several hundreds of MHz to low GHz).

[0017] There is therefore a need for a new and improved material formagnetic shielding and keeper applications in MRAM devices, which isadapted for integration with a multi-layer fabrication process.

SUMMARY OF THE INVENTION

[0018] Generally, the present invention provides a soft magneticmaterial with improved properties for use in both shield and keeperapplications in MRAM devices.

[0019] One non-limiting advantage of the invention is that it uses filmsof amorphous soft magnetic alloys, such as CoZrTa, for magneticshielding and keeper applications. These amorphous soft magnetic alloyshave several unique advantages to allow for integration with a dualdamascene Copper/SiO₂ (or low-k) metallization process. Somenon-limiting examples include:

[0020] (i) excellent thermal stability (e.g., crystallizationtemperature >450° C.), making this material compatible with standardCMOS backend processing;

[0021] (ii) significant permeability up to the write frequenciesrequired in high speed memory devices (several GHz); and

[0022] (iii) for the case of CoZrTa, the possibility to eliminate thebarrier layer.

[0023] Another non-limiting advantage of the present invention is thatit provides a soft magnetic shielding layer that may be introducedbetween subsequent layers of a multilevel metallization. This allows forthe transport of large currents through metallization layers located onone side of the magnetic layer, without affecting the magnetic state ofMRAM cells located on the other side of the magnetic layer.

[0024] Another non-limiting advantage of the present invention is thatit provides an amorphous, soft magnetic material that can be interposedbetween different layers of spindependent tunnel junctions.

[0025] According to a first aspect of the present invention, a keeper isprovided for an MRAM device including a bit region and a currentcarrying line which magnetically interacts with the bit region. Thekeeper comprises an amorphous soft magnetic material which is disposedgenerally around the current carrying line.

[0026] According to a second aspect of the present invention, ashielding structure is provided for an MRAM device having a bit regionand a current carrying line which magnetically interacts with the bitregion. The shielding structure includes an amorphous soft magneticmaterial which is disposed adjacent to the MRAM device and which iseffective to block external magnetic fields from affecting the bitregion of the MRAM device.

[0027] According to a third aspect of the present invention, a method offabricating a keeper for an MRAM device having a bit region and acurrent carrying line is provided. The method includes the steps of:providing an amorphous soft magnetic material; and forming the keeperfrom the amorphous soft magnetic material.

[0028] According to a fourth aspect of the present invention, a methodof fabricating a shielding structure for an MRAM device is provided. Themethod includes the steps of: providing an amorphous soft magneticmaterial; and forming the shielding structure from the amorphous softmagnetic material.

[0029] According to a fifth aspect of the present invention, a method offabricating an MRAM device is provided. The method includes the stepsof: providing a substrate; depositing a dielectric layer on thesubstrate; forming a trench in the dielectric layer for forming a firstcurrent carrying line; depositing an amorphous soft magnetic material inthe trench; depositing a conductor into the trench, thereby forming thefirst current carrying line, wherein the amorphous soft magneticmaterial forms a first keeper around the first current carrying line;forming a bit region over the current carrying line; forming a secondcurrent carrying line above the bit region; and depositing an amorphoussoft magnetic material above the second current carrying line, therebyforming a second keeper around the second current carrying line.

[0030] These and other features, advantages, and objects of theinvention will become apparent by reference to the followingspecification and by reference to the following drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

[0031] FIGS. 1A-1G depict an exemplary process flow for fabricating anMRAM device having keepers, according to the present invention.

[0032]FIG. 2 is side sectional view of an MRAM device including layersfor shielding against external magnetic fields.

[0033]FIG. 3 is a side sectional view of an MRAM device includingshielding between memory cells on different levels.

[0034]FIG. 4 depicts a pair of tables showing exemplary processvariables that may be used in a PVD tool to deposit an amorphous softmagnetic alloy, according to one embodiment of the present invention,and optimized responses for the deposition process.

[0035]FIG. 5 is a table illustrating exemplary process conditions thatmay be used to deposit a keeper layer of amorphous soft magneticmaterial in an MRAM fabrication process, according to one embodiment ofthe invention.

[0036]FIG. 6 is a magnetization loop for a 2000 Å CoZrTa film.

DETAILED DESCRIPTION OF THE EMBODIMENTS

[0037] The present invention will now be described in detail withreference to the drawings, which are provided as illustrative examplesof the invention so as to enable those skilled in the art to practicethe invention. The preferred embodiment of the soft magnetic shield andkeeper and the method for forming the same are described in relation toa multi-layer MRAM fabrication procedure. However, it will beappreciated by those skilled in the art that the present invention isequally applicable to other types of fabrication procedures.

[0038] Generally, soft magnetic thin film materials can be classified inthree main classes including: (1) crystalline metallic films such asPermalloy (NiFe alloys around the composition Ni₈₀Fe₂₀), FeXN (where Xmay be a metal such as Ta, Al, Ti, etc.), and the like; (2) Oxidicmetallic films such as Manganese Zinc Ferrite or Nickel Zinc Ferrite;and (3) amorphous metallic films such as CoNbZr, CoTaZr or CoPdZr. Whileprior art MRAM fabrication procedures have included the use of class (1)and (2) materials for shielding and keeper applications, none of theprior art have contemplated the use of class (3) materials.

[0039] The present invention provides MRAM devices that utilizeamorphous, soft magnetic thin film materials (e.g., class (3) materials)for shielding and keeper applications, and a process for forming suchdevices. In the preferred embodiment, the family of amorphous metallicalloys of the form CoZrX, where X may be Nb, Ta, Pd and/or Rh forexample, are used for integrated magnetic shielding and keeper layers inan MRAM device fabrication procedure.

[0040] FIGS. 1A-1H depict an exemplary embodiment of a process flow,which may be utilized for fabricating an MRAM apparatus, according tothe present invention. FIG. 1A depicts a side sectional view of aconventional substrate 100, and a dielectric (e.g., SiO₂ or other low kmaterial) layer 102, which is deposited on top of substrate 100 in aconventional manner. In the first step of the process flow, a word orbit line trench 104 is formed (e.g., etched) into the dielectric layer102 in a known manner.

[0041]FIG. 1B illustrates a second step in the process flow. In thissecond step, a keeper layer 106 is deposited on top of the dielectriclayer 102. The keeper layer 106 is formed from an amorphous, softmagnetic material. Particularly, in the preferred embodiment, the keeperlayer 106 is formed from an amorphous metallic alloy, such as CoZrX,where X may be Ta, Nb, Pd and/or Rh. Any suitable ratios of Co, Zr, Ta,Nb, Pd, and Rh may be used in the alloy, and those skilled in the artwill appreciate how to select ratios for certain alloys to provide theamorphous and soft magnetic properties, and to ensure that the materialbest suits a particular application. For example, in one embodiment, theCo concentration should be in the range of approximately 80-90% toensure a high saturation magnetization. Furthermore, the proportions ofthe elements may be adjusted to achieve a desired the magnetostrictionconstant λ of the material. One of ordinary skill in the art willappreciate how to make such adjustments. For example, K.Hayashi et al.,J.Appl. Phys., Vol. 61, p. 2983 (1987) teach a variety of compositionsin the ternary phase diagram, suitable for this application. Theparticular composition can be chosen based on specific requirements forcrystallization temperature and saturation magnetization.

[0042] In one embodiment, the aspect ratio of the sidewall coverage inthe trench 104 may be in the range of approximately 1:0.5 to 1:2. Forexample, in one embodiment, the thickness of the keeper 106 on thebottom of the trench 104 may be approximately 100 Å, and the thicknesson the side of the trench may be approximately 50 Å. In the preferredembodiment, the thickness “d” of the keeper 106 may be in the range of50 to 500 Å.

[0043] In one embodiment the keeper layer 106 may be formed or depositedby use of a Physical Vapor Deposition (PVD) or sputtering process, whichmay be performed in a conventional PVD cluster tool in the presence of amagnetic field. Other techniques that may be used include Ion BeamDeposition (IBD), evaporation, ionized PVD (I-PVD), ion-metal plasma(IMP), Cathodic Arc deposition, atomic layer deposition (ALD), ChemicalVapor Deposition (CVD) or Electroplating. However, PVD is preferredsince it is well-established that PVD allows to deposit films with theappropriate magnetic properties. The application of a magnetic fieldduring deposition leads to better-defined soft magnetic properties. Someexamples of process variables that may be used in a PVD tool (with nocollimation, physical collimation and natural collimation) to deposit aparticular amorphous soft magnetic alloy (i.e., CoZrNb) are illustratedin table 400 of FIG. 4, and optimized responses for the process areshown in table 410 of FIG. 4.

[0044] In the step illustrated in FIG. 1B, a lining layer 108 may alsobe deposited on top of the keeper layer 106. In one embodiment, thelining layer 108 may comprise TaN. In other embodiments, the lininglayer 108 may be deposited first (e.g., on top of the dielectric layer102), followed by the keeper layer 106 (e.g., on top of the lining layer108). The lining layer 108 may serve as a diffusion barrier and adhesionlayer.

[0045] In the next step of the process flow, illustrated in FIG. 1C, aconductive material (e.g., Cu or Al) is deposited within the trench 104,thereby forming a current carrying line 110 (e.g., a word or bit line).In the preferred embodiment, the current carrying line 110 is formed bydepositing conductive material over the entire surface of the device byuse of a conventional electroplating process. Next, a chemicalmechanical polish is performed over the surface of the device, effectiveto remove excess portions of the conductive material, keeper, and liner,thereby forming the structure shown in FIG. 1C. As shown in FIG. 1C,keeper 106 is formed or disposed generally around current carrying line110 (e.g., in relative close proximity and/or adjacent to the bottom andside walls of the current carrying line 110). In other embodiments,keeper 106 may have a different shape, and in one example, keeper 106may be adjacent only to the bottom of line 110.

[0046] In the next step of the process flow, illustrated in FIG. 1D, atunnel-magneto-resistance (TMR) stack 112 is deposited across thesurface of the device in a conventional manner. The TMR stack mayinclude a plurality of layers 112 a-112 d. In one embodiment, layer 112a may be an anti-ferromagnetic layer (e.g., 200 Å IrMn); layer 112 b maybe a “pinned” layer (e.g., 25 Å CoFe/8 Å Ru/20 Å CoFe); layer 112 c maybe a tunnel barrier (e.g., 15 Å Al ₂O₃), and layer 112 d may be a “free”layer (e.g., 10 Å CoFe/ 30 Å NiFe). Portions of the TMR stack 112 arethen removed (e.g., etched) in a conventional manner (e.g., using an IonBeam Etch (IBE)), effective to form the structure shown in FIG. 1E,wherein the remaining portion of the TMR stack 112 forms the bit regionof an MRAM memory cell.

[0047] In the next step of the process flow, illustrated in FIG. 1F, anencapsulation layer 114, which may comprise a dielectric material (e.g.,SiO₂), is deposited over the entire surface of the device in aconventional manner. After the layer 114 is deposited, a chemicalmechanical polish may be performed to provide the resulting structureillustrated in FIG. 1F.

[0048] In the next step of the process flow, illustrated in FIG. 1G, aconductive material (e.g., Cu or Al) is deposited over the surface ofthe device, and is subsequently etched, to form a current carrying line116 (e.g., a word or bit line), which is disposed in a substantiallyperpendicular relationship with line 110. Line 116 is formed over bitregion 112, which is located between line 110 and line 116. Line 116 mayhave generally the same shape as line 110 (e.g., line 116 may have arectangular cross section).

[0049] In the next step of the process flow, illustrated in FIG. 1H, atop keeper layer 118 is deposited on top of the conductor 116, therebyforming MRAM device 120. The keeper layer 118 is formed from anamorphous, soft magnetic material, which may be substantially identicalto the material that forms keeper layer 106. Particularly, in thepreferred embodiment, the keeper layer 118 may be formed from anamorphous metallic alloy, such as CoZrX, where X may be Ta, Nb, Pdand/or Rh. The keeper layer 118 may also be formed by use of a PVD tool,in a process substantially similar to the process used to form keeper106, including the application of a magnetic field during deposition.Keeper 118 is formed or disposed generally around current carrying line116 (e.g., in relative close proximity to and/or adjacent to the top andside walls of the current carrying line 116). In other embodiments,keeper 118 may have a different shape, and in one example, keeper 118may be adjacent only to the bottom of line 116. In the preferredembodiment, the thickness “d” of the keeper 118 may be in the range of50 to 500 Å.

[0050] It should be appreciated that while a single MRAM device 120 isillustrated in FIGS. 1A-1H, the foregoing process may be used to createmultiple MRAM devices 120.

[0051] The use of amorphous soft magnetic alloys in the forgoingfabrication process provides significant advantages over prior materialsand processes. Particularly, the amorphous soft magnetic alloys haveseveral unique advantages that support integration in a multi-layer(e.g., dual damascene Copper/SiO₂ or low-k) metallization process,including: (i) excellent thermal stability (e.g., crystallizationtemperature >450° C.), making the materials compatible with standardCMOS backend processing; (ii) significant permeability up to the writefrequencies required in high speed memory devices (several GHz); and(iii) for some amorphous soft magnetic allows, such as CoZrTa, thepossibility to eliminate or reduce the diffusion barrier layer.

[0052] In one embodiment of the present invention, one or more shieldinglayers may be formed around the MRAM device to provide shielding fromexternal fields. FIG. 2 illustrates one non-limiting embodiment of anMRAM device 200 including top and bottom shielding layers 130, 134,respectively, which are formed from amorphous soft magnetic materials.As shown in FIG. 2, shielding layers 130, 134 are disposed in relativeclose proximity to and/or adjacent to the top and bottom of the MRAMdevice 200. Particularly, shielding layer 130 is disposed above currentcarrying line 116, and shielding layer 134 is disposed below currentcarrying line 116. MRAM device 200 includes many of the same elements asMRAM device 120, as indicated by those elements having identicalreference numerals. MRAM device 200 may be formed by continuing theprocess flow from FIG. 1H, and depositing the top and bottom shieldinglayers on device 120 in any order. In the preferred embodiment, adielectric layer 132 (e.g., SiO₂) is deposited on top of keeper 118, andthe top shielding layer 130 is deposited on top of dielectric layer 132.The bottom shielding layer 134 may be deposited directly below substrate100.

[0053] The shielding layers 130, 134 may be formed by use of a PhysicalVapor Deposition (PVD) or sputtering process, which may be performed ina conventional PVD cluster tool in the presence of a magnetic field. Inthe preferred embodiment, the thickness “d” of the shielding layers maybe in the range of 0.1 μm to 10 μm. In one embodiment, the thickness “d”of the shielding layers is approximately 1 μm. One example of processconditions that may be used in a known PVD tool to deposit a particularamorphous soft magnetic alloy (i.e., Co_(91.5)Zr₄Ta_(4.5)) areillustrated in table 500 of FIG. 5.

[0054] The amorphous soft magnetic shielding layers 130, 134 willprevent stray flux from reaching and/or affecting the bit region 112 ofthe MRAM cell.

[0055] In another embodiment of the present invention, one or moreshielding layers may be formed between MRAM cells at different levels ofa multilevel MRAM device. FIG. 3 illustrates one non-limiting embodimentof a multilevel MRAM device 300 including a top level 120 a and a bottomlevel 120 b, which are separated by a shielding layer 140, which isformed from an amorphous soft magnetic material. MRAM device 300includes many of the same elements as MRAM device 120, as indicated bythose elements having identical reference numerals with the addition ofan “a” or “b” character to differentiate between top level device 120 aand bottom level device 120 b. MRAM devices 120 a, 120 b may be formedin a substantially similar manner as MRAM device 120. In the preferredembodiment, bottom level device 120 b is formed first. After the bottomlevel device 120 b is formed, a dielectric layer 142 (e.g., SiO₂) isdeposited on top of keeper 118 b. The shielding layer 140 is depositedon top of dielectric layer 142.

[0056] The shielding layer 140 may be formed by use of a Physical VaporDeposition (PVD) or sputtering process, which may be performed in aconventional PVD cluster tool in the presence of a magnetic field. Inthe preferred embodiment, the thickness of the shielding layer 140 maybe in the range of 0.1 μm to 10 μm. In one embodiment, the thickness “d”of the shielding layer 140 is approximately 1 μm. The process conditionsthat may be used in a PVD tool to deposit the shielding layer 140 may besubstantially identical to those used to deposit shielding layers 130,134.

[0057] After shielding layer 140 is formed, a dielectric layer 144(e.g., SiO₂) may be deposited on top of layer 140. Top level device 120a may then be formed on top of dielectric layer 144. The soft magneticshielding layer(s) 140 will substantially prevent all magnetic fieldsgenerated during the writing of one level from affecting the state ofthe other level(s), thereby avoiding erroneous reading and writing.

[0058] It has been shown that amorphous soft magnetic films, such asCoZrTa films, deposited by conventional Physical Vapor Deposition (PVD)could be integrated in a standard multilevel metallization flow, withoutloss of permeability. For example, CoZrTa films have been found to havea high permeability (e.g., μ˜1000) up to the GHz frequency range. Sincethe typical write pulses of an MRAM cell is on the order of 2 ns, thistype of soft magnetic layer will act as such for this kind of pulsewidth.

[0059] It has further been found that such films can be made byconventional DC-magnetron Physical Vapor Deposition (PVD) in thepresence of an external magnetic field. For example, from aCo_(91.5)Zr₄Ta_(4.5) target at 3500 W power density, 5 mTorr of Arpressure and 5 Amperes of current in the electromagnet gave a depositionrate of 36 Å/s, sufficient for industrial application in a highthroughput manufacturing environment. These films are found to beamorphous and display excellent soft magnetic properties, as illustratedby the magnetization loop of FIG. 6. Particularly, FIG. 6 illustrates amagnetization loop for a 2000 Å CoZrTa film.

[0060] Hence, the use of amorphous soft magnetic materials for shieldingand keeper applications in MRAM devices provides significant advantagesover class (1) and class (2) materials. For example, the amorphous softmagnetic materials display a much higher crystallization temperature andare thus better suited for a multi-layer MRAM fabrication process. Theamorphous soft magnetic materials also have significant permeability upto the write frequencies required in high speed memory devices (severalGHz). Moreover, some amorphous soft magnetic alloys, such as CoZrTa,allow for the elimination or reduction of a diffusion barrier layer.

[0061] It should be understood that the inventions described herein areprovided by way of example only and that numerous changes, alterations,modifications, and substitutions may be made without departing from thespirit and scope of the inventions as delineated within the followingclaims.

What is claimed is: 1) A keeper for an MRAM device including a bitregion and a current carrying line which magnetically interacts with thebit region, the keeper comprising: an amorphous soft magnetic materialwhich is disposed generally around the current carrying line. 2) Thekeeper of claim 1 wherein the current carrying line includes a bottomand a pair of side surfaces, and wherein the material is adjacent to thebottom and pair of side surfaces. 3) The keeper of claim 2 wherein thematerial on the bottom and pair of side surfaces has an aspect ratio inthe range of approximately 1:0.5 to 1:2. 4) The keeper of claim 1wherein the current carrying line includes a top surface and a pair ofside surfaces, and wherein the material is adjacent to the top and pairof side surfaces. 5) The keeper of claim 1 wherein the amorphous softmagnetic material is an amorphous metallic alloy of the form CoZrX,where X is selected from the group consisting of Ta, Nb, Pd and Rh. 6)The keeper of claim 5 wherein the amorphous soft magnetic material has athickness in the range of approximately 50 Å to 500 Å. 7) The keeper ofclaim 1 further comprising a lining layer disposed between the amorphoussoft magnetic material and the current carrying line. 8) A shieldingstructure for an MRAM device having a bit region and a current carryingline which magnetically interacts with the bit region, the shieldingstructure comprising: an amorphous soft magnetic material which isdisposed adjacent to the MRAM device and which is effective to blockexternal magnetic fields from affecting the bit region of the MRAMdevice. 9) The shielding layer of claim 8 wherein said amorphous softmagnetic material comprises a first layer which is disposed below thebit region and current carrying line, and a second layer which isdisposed above the bit region and current carrying line. 10) Theshielding layer of claim 8 wherein the amorphous soft magnetic materialis an amorphous metallic alloy of the form CoZrX, where λ may beselected from the group consisting of Ta, Nb, Pd and Rh. 11) Theshielding layer of claim 10 wherein the amorphous soft magnetic materialhas a thickness in the range of approximately 0.1 μm to 10 μm. 12) Amethod of fabricating a keeper for an MRAM device having a bit regionand a current carrying line, the method comprising the steps of:providing an amorphous soft magnetic material; and forming the keeperfrom the amorphous soft magnetic material. 13) The method of claim 12wherein the amorphous soft magnetic material is an amorphous metallicalloy of the form CoZrX, where X is selected from the group consistingof Ta, Nb, Pd and Rh. 14) The method of claim 12 wherein the step offorming the keeper includes the following steps: providing a substrate;depositing a dielectric layer on the substrate; forming a trench in thedielectric layer for forming a current carrying line; depositing theamorphous soft magnetic material in the trench; and depositing aconductor into the trench, thereby forming the current carrying line,wherein the amorphous soft magnetic material forms a keeper around thecurrent carrying line. 15) The method of claim 14 wherein the amorphoussoft magnetic material is deposited in the presence of an externalmagnetic field. 16) The method of claim 14 wherein the amorphous softmagnetic material is deposited by use of a PVD process. 17) The methodof claim 12 wherein the step of forming the keeper includes thefollowing steps: forming the bit region from a TMR stack; encapsulatingthe bit region with a dielectric material; forming a current carryingline over the bit region; and depositing the amorphous soft magneticmaterial over the current carrying line, thereby forming a keeper aroundthe current carrying line. 18) The method of claim 17 wherein theamorphous soft magnetic material is deposited in the presence of anexternal magnetic field. 19) The method of claim 17 wherein theamorphous soft magnetic material is deposited by use of a PVD process.20) A method of fabricating a shielding structure for an MRAM device,the method comprising the steps of: providing an amorphous soft magneticmaterial; and forming the shielding structure from the amorphous softmagnetic material. 21) The method of claim 20 wherein the amorphous softmagnetic material is an amorphous metallic alloy of the form CoZrX,where X is selected from the group consisting of Ta, Nb, Pd and Rh. 22)The method of claim 20 wherein the step of forming the shieldingstructure includes the following step: depositing a first layer of theamorphous soft magnetic material adjacent to the MRAM device. 23) Themethod of claim 22 wherein the step of forming the shielding structurefurther includes the following step: depositing a second layer of theamorphous soft magnetic material adjacent to the MRAM device, whereinthe first layer is disposed below the MRAM device and the second layeris disposed above the MRAM device. 24) The method of claim 23 whereinthe amorphous soft magnetic material is deposited in the presence of anexternal magnetic field. 25) The method of claim 24 wherein theamorphous soft magnetic material is deposited by use of a PVD process.26) The method of claim 20 wherein the MRAM device includes a firstlevel of cells and a second level of cells, and wherein the step offorming the shielding structure includes: forming a layer of amorphoussoft magnetic material between the first and second levels of cells. 27)The method of claim 26 wherein the step of forming the a layer of theamorphous soft magnetic material between the first and second levels ofcells includes: forming the first level of cells; depositing a layer ofamorphous soft magnetic material on the first level of cells; andforming the second level of cells above the layer of amorphous softmagnetic material. 28) The method of claim 27 wherein the layer ofamorphous soft magnetic material is deposited in the presence of amagnetic field. 29) The method of claim 28 wherein the layer ofamorphous soft magnetic material is deposited by use of a PVD process.30) A method of fabricating an MRAM device comprising the steps of: a)providing a substrate; b) depositing a dielectric layer on thesubstrate; c) forming a trench in the dielectric layer for forming afirst current carrying line; d) depositing an amorphous soft magneticmaterial in the trench; e) depositing a conductor into the trench,thereby forming the first current carrying line, wherein the amorphoussoft magnetic material forms a first keeper around the first currentcarrying line; f) forming a bit region over the current carrying line;g) forming a second current carrying line above the bit region; and h)depositing an amorphous soft magnetic material above the second currentcarrying line, thereby forming a second keeper around the second currentcarrying line. 31) The method of claim 30 further comprising the step ofdepositing a liner layer in the trench. 32) The method of claim 31wherein the step of depositing a liner layer in the trench is performedbefore step d). 33) The method of claim 31 wherein the step ofdepositing a liner layer in the trench is performed after step d). 34)The method of claim 30 wherein the amorphous soft magnetic material isan amorphous metallic alloy of the form CoZrX, where X is selected fromthe group consisting of Ta, Nb, Pd and Rh. 35) The method of claim 30further comprising the step of: forming at least one shielding layer ofamorphous soft magnetic material adjacent to the MRAM device forshielding the bit region from external magnetic fields. 36) The methodof claim 30 further comprising the steps of: i) forming a shieldinglayer of amorphous soft magnetic material above the MRAM device; and j)forming a second level MRAM device above the shielding layer, theshielding layer being effective to substantially prevent magnetic fieldsfrom being transferred between the MRAM device and the second level MRAMdevice.